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Irvine semiconductor startup Celero Communications closes a $275M Series C led by CapitalG, Atreides, and Valor after validating the industry's first 2nm coherent DSP silicon chip.
- $275M Series C led by CapitalG, Atreides Management, and Valor Equity Partners values Celero above $3 billion, two years after founding.
- Celero validated the first 2nm coherent DSP silicon with advanced analog integration, supporting 1.6T to 3.2T AI optical interconnects.
- Total capital raised hits $415M since Celero's 2024 founding, with existing backers Sutter Hill Ventures and Maverick Silicon continuing participation.
Lead
Celero Communications, the Irvine, California-based coherent optical semiconductor company, closed a $275 million Series C on September 8, 2026, at a valuation exceeding $3 billion. The round came on the heels of a concrete technical milestone: the company successfully validated silicon manufactured on a 2-nanometer process node, marking what the company calls the first coherent digital signal processor (DSP) ever built at that geometry. The lead investors - Alphabet's CapitalG, Atreides Management, and Valor Equity Partners - are effectively making a bet that optical interconnect silicon becomes the next hard constraint binding AI cluster performance.
What Did Celero Actually Build?
Celero builds coherent DSPs for the optical links that connect GPU racks across data centers. Its newly validated chip combines DSP processing with advanced analog circuitry on a single 2nm die, enabling transmission rates from 1.6 terabits per second up to 3.2 Tbps per port. The 2nm process node is the most advanced in commercial production; prior coherent DSPs for data center applications were built on 5nm or 7nm geometries. Celero's design compresses the electronics required for coherent optical communication - historically spread across multiple chips and packages - into a geometry that cuts power consumption while pushing throughput toward the ranges that next-generation AI infrastructure demands.
The founders came from the firms that built the previous generation of coherent silicon. Leadership includes alumni from Marvell, Inphi, Broadcom, and ClariPhy - companies whose DSP and optical design work underpins most of today's deployed coherent optics. The company was founded in 2024 and has design centers in Canada and Argentina in addition to its Irvine headquarters.
Why Does the Process Node Matter for Optical Connectivity?
Moving coherent DSP silicon from 7nm or 5nm to 2nm is not an incremental update; the bandwidth and power math changes substantially. At 3.2 Tbps per port, each link carries roughly double the throughput of current high-end coherent transceivers. Power per bit transmitted drops, which matters when a hyperscale AI cluster is already consuming tens of megawatts for compute alone. The analog integration enabled at 2nm also reduces the number of separate components needed between the DSP and the optical modulator, which shrinks module footprint and simplifies the supply chain for transceiver makers.
The practical significance is that AI training clusters increasingly require connectivity at the scale-across layer - between GPU nodes spread across racks and buildings - to match the throughput already available inside a single node via NVLink or similar. Coherent optics at 1.6T and 3.2T is the technology expected to fill that gap, and the DSP is the highest-value component in those transceivers.
Who Backed the Round and What It Signals
CapitalG, Alphabet's independent growth equity fund, led alongside Atreides Management and Valor Equity Partners. Existing investors Sutter Hill Ventures and Maverick Silicon continued participation. Sutter Hill and Maverick Silicon's involvement from earlier rounds signals that prior backers remain confident in the technical trajectory rather than simply preserving pro-rata stakes.
The $3 billion-plus valuation puts Celero above the threshold typically associated with late-stage pre-revenue semiconductor companies - a sign that investors are pricing in a market opportunity tied to the sustained capital expenditure cycle in hyperscale AI infrastructure. The $275 million sum also gives the company a long runway toward production readiness without an imminent need to tap the public markets.
Competitive Context
Coherent DSP for data center interconnect is not an uncontested market. Established players including Marvell and Broadcom both ship silicon for coherent optical transport, and several startups have targeted adjacent portions of the transceiver stack. What Celero is asserting with this announcement is a process-node lead: no competing coherent DSP for data center optical applications is in production or validation at 2nm. Whether that lead translates into design wins before competitors close the gap is the central question the company's roadmap now has to answer.
The $415 million total raised in roughly two years of operation reflects how capital-intensive the silicon development cycle has become at leading-edge nodes. Tape-out costs at 2nm are measured in tens of millions of dollars per run; the Series C gives Celero the capacity to move from validation toward production qualification without the financial constraints that have derailed earlier deep-tech semiconductor efforts.
Outlook
Celero enters the second half of 2026 with validated silicon, $275 million in fresh capital, and a clear product target in 1.6T and 3.2T coherent transceivers for AI data centers. The next milestones will be customer sampling and design-in announcements from transceiver manufacturers. If hyperscale AI capex holds at current levels - and forward guidance from the major cloud operators suggests it will - demand for high-bandwidth, low-power optical connectivity at 3.2 Tbps should materialize within the product's target launch window. The company's ability to convert a process-node first into production volume before the 2nm window closes for competitors will determine whether the $3 billion valuation proves conservative or stretched.
