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Sector-Specific Earnings

Semiconductor Earnings Cycles

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Semiconductor Earnings Cycles

Semiconductor earnings are fundamentally different from software earnings. While a SaaS company's recurring revenue is highly predictable and grows linearly, semiconductor earnings are volatile, cyclical, and driven by capital intensity, supply-demand imbalances, and multi-quarter inventory dynamics. A semiconductor company's earnings in any given quarter are determined not by the strength of current demand alone, but by the delicate balance between demand, factory capacity utilization, wafer prices, and customer inventory levels. A company producing chips for smartphones, data centers, or automotive systems might face surging demand that translates to record revenue and earnings for a quarter, only to see demand collapse six months later as customers work down inventory. Understanding semiconductor earnings requires analysis of factors almost entirely absent from software company earnings: wafer capacity utilization, average selling price (ASP) trends, customer inventory levels, order backlog, and the multi-quarter lag between setting production capacity and generating revenue from that capacity. This article explores the unique dynamics that drive semiconductor company earnings and how to interpret them correctly.

Quick definition: Semiconductor earnings are driven by cyclical demand patterns, capital intensity, and inventory dynamics rather than by recurring subscriptions; semiconductor companies report earnings metrics including capacity utilization rate, average selling price (ASP) per wafer, order backlog, inventory days, and capital intensity (CapEx as a percentage of revenue) to reflect the capital-heavy, cyclical nature of chip manufacturing and design.

Key takeaways

  • Semiconductor earnings are highly cyclical, with demand surges followed by periods of oversupply and price compression; understanding the position in the cycle is more important than absolute earnings levels
  • Capacity utilization rate (the percentage of manufacturing capacity in use) is the most important operational metric; utilization above 90% indicates tight supply and pricing power, while below 70% suggests oversupply and margin compression
  • Average selling price (ASP) per wafer is the primary driver of semiconductor earnings and can fluctuate 20–30% annually based on competition, product mix, and supply-demand dynamics; trending ASP is more important than absolute ASP levels
  • Order backlog, measured in months of production (e.g., "3 months of backlog"), provides visibility into future revenue; backlog expansion signals growing demand, while backlog compression signals slowing demand
  • Customer inventory levels are critical to monitoring; when customers accumulate excess inventory, order cancellations and demand collapse typically follow 1–2 quarters later, often catching markets by surprise
  • Gross margins in semiconductors vary dramatically by business model: fabless design companies can achieve 50–70% margins, foundries 40–50%, and integrated device manufacturers (IDMs) 30–45%, depending on capacity utilization and product mix
  • Capital intensity (CapEx as a percentage of revenue) of 20–30% for foundries and 15–25% for IDMs represents a major earnings headwind; companies must generate strong cash flow to fund R&D and capacity expansion

Semiconductor Industry Structure: Design, Manufacturing, and Foundries

Understanding semiconductor earnings requires understanding the industry structure. The semiconductor industry has fragmented into three distinct business models, each with different earnings dynamics.

Fabless Companies (Design-Only):

Fabless companies (Fabless = "fab-less," without a fabrication plant) design chips but outsource manufacturing to foundries. Examples include Qualcomm (smartphone and wireless chips), NVIDIA (GPUs), Broadcom (networking and infrastructure), and AMD (CPUs and GPUs). Fabless companies have high gross margins (50–70%) because they don't own manufacturing capacity and therefore don't bear the capital costs of building and operating fabs. Their earnings are largely driven by design innovation, market share within their end-markets, and volume. Fabless companies report revenue growth and gross margin, but capacity utilization is not a constraint because they contract with foundries that manage capacity.

Integrated Device Manufacturers (IDMs):

IDMs both design and manufacture chips. Examples include Intel, Samsung, Broadcom (dual design and manufacturing), and SK Hynix. IDMs own fabs and therefore bear the capital costs of building, maintaining, and operating manufacturing facilities. Their earnings are subject to capacity utilization fluctuations; if fabs run at high utilization during demand surges, margins are strong, but if utilization drops during downturns, fixed costs crush margins. IDMs typically have 30–50% gross margins, lower than fabless but higher than foundries due to higher-value products and greater vertical integration.

Pure-Play Foundries:

Pure-play foundries (TSMC and Samsung Foundry Services) manufacture chips designed by others but are available for customer use. Foundries have moderate gross margins (40–50%) due to the capital intensity of manufacturing. Their earnings are driven by capacity utilization, wafer pricing, and the mix of products manufactured. TSMC, the world's largest pure-play foundry, reports gross margins that fluctuate from 45% to 55% based on capacity utilization and product mix.

Each business model has distinct earnings dynamics. Fabless companies' earnings are relatively predictable and less cyclical. IDM and foundry earnings are highly cyclical, driven by capacity utilization and pricing.

Capacity Utilization Rate: The Most Important Semiconductor Metric

Capacity utilization rate measures the percentage of available manufacturing capacity in use. For example, if a fab has the capacity to produce 100,000 wafers per month but is currently producing 85,000 wafers per month, the utilization rate is 85%.

Formula:

Capacity Utilization Rate = Actual Wafers Produced ÷ Maximum Wafer Capacity × 100%

Why Capacity Utilization Matters:

Semiconductor fabs are capital-intensive, high-fixed-cost operations. A state-of-the-art fab built in 2024 to produce 3-nanometer chips costs $10–20 billion to construct. Whether the fab produces at 60% utilization or 95% utilization, most costs are fixed: labor, utilities, depreciation, and maintenance occur regardless. As utilization increases, these fixed costs are spread across more units, dramatically improving profitability.

When capacity utilization rises above 90%, the business enters pricing power territory. Customers face supply scarcity and are willing to pay premium prices. Gross margins can expand to 50–60% (for foundries) or 45–65% (for IDMs). Companies with high utilization can also negotiate longer-term contracts and lock in customers.

Conversely, when utilization drops below 70%, the industry typically enters margin compression territory. With excess supply, customers can negotiate lower prices or shift to competitors. Gross margins compress to 30–40% (for foundries) or 25–45% (for IDMs), and companies often struggle to achieve positive cash flow despite having positive GAAP earnings.

Example Utilization and Margin Dynamics:

During the 2021–2022 chip shortage, semiconductor fabs worldwide ran at 95%+ utilization. TSMC's gross margin expanded to 54%; Samsung Foundry's gross margin improved; Intel's manufacturing margins strengthened. Companies were raising prices 10–15% quarterly to manage demand, and customers were placing orders 6–9 months in advance due to supply scarcity.

In contrast, after the chip shortage broke in 2023, fab utilization dropped to 40–50% as customers worked down excess inventory. TSMC's gross margin compressed to 46–48%; foundry pricing declined 10–20%; inventory writedowns became common as prior-period high-cost inventory became obsolete.

Interpreting Utilization Trends:

  • Utilization > 90%: Tight supply, strong pricing, margin expansion likely
  • Utilization 80–90%: Balanced supply and demand, stable margins
  • Utilization 70–80%: Early warning of oversupply, margin compression beginning
  • Utilization < 70%: Excess supply, pricing pressure, margin compression, potential cash flow challenges

Average selling price is the revenue per wafer or per chip, depending on the product. ASP is a key metric because semiconductor pricing is highly competitive and can move 15–30% in a year based on competition, product mix, and supply-demand dynamics.

Formula:

ASP = Total Revenue ÷ Total Units (Wafers or Chips) Sold

Product Mix and ASP:

Different chip types have dramatically different ASPs and margins. A high-end GPU for data centers might generate $1,000+ per wafer in revenue, while commodity DRAM or NAND flash might generate $50–100 per wafer. A company's overall ASP depends on its product mix.

When demand is strong for high-value products (AI processors, advanced GPUs, cutting-edge microprocessors), ASP rises and margins expand. When demand shifts to commodity chips or customers shift to older-node products, ASP falls and margins compress.

Example: NVIDIA reported strong average selling prices in FY2024 due to massive demand for AI GPUs (H100 and advanced chips). These GPUs commanded premium pricing because demand far exceeded supply. In contrast, NVIDIA's older-generation GPUs and non-AI products had lower ASP and margins. As competition increased and supplies improved, ASP was expected to normalize downward.

Interpreting ASP Trends:

When analyzing semiconductor earnings, always examine whether revenue growth is coming from volume (more units sold at stable prices) or ASP (higher prices on stable or declining volumes). Revenue growing from ASP increases can be followed by sharp declines if prices normalize; revenue growing from volume increases is more sustainable if it reflects genuine demand growth.

Example: A chip company reports 20% revenue growth. If the growth is entirely from ASP increases (prices up 20%, volumes flat), the company is vulnerable to price normalization. If the growth is from volume growth (units up 20%, prices stable), it's more durable.

Order Backlog and Lead Times

Order backlog measures the value or volume of orders received but not yet fulfilled. Backlog is typically reported in months of production (e.g., "TSMC has 3 months of backlog").

Why Backlog Matters:

Backlog provides visibility into future revenue and signals demand trends. Expanding backlog (from 2 months to 3 months) indicates growing demand. Contracting backlog (from 3 months to 1.5 months) signals weakening demand, often preceding revenue deceleration.

During the 2021–2022 chip shortage, semiconductor makers had 6–12 months of backlog, indicating massive demand far exceeding supply. Companies had almost zero visibility risk; they could forecast revenue 6–12 months ahead with confidence.

In contrast, when the chip shortage ended in 2023, backlog collapsed to 4–6 weeks across most suppliers. Lead times normalized, and customers could order chips just-in-time. When backlog contracts to very low levels (2–4 weeks), it's often a warning sign that demand is weakening faster than anticipated, potentially preceding earnings misses.

Interpreting Backlog Changes:

  • Backlog expanding (weeks to months): Demand accelerating, supply tight, pricing likely strong
  • Backlog stable (3–6 months): Normal healthy visibility
  • Backlog contracting (months to weeks): Demand softening, competitive pressure increasing, potential pricing decline ahead
  • Backlog at 2–4 weeks: Weak demand, potential demand cliff ahead

Critical insight: Backlog changes often precede earnings changes by 1–2 quarters. A company reporting strong current-quarter earnings with contracting backlog is at risk of earnings disappointment in future quarters.

Customer Inventory Levels and Destocking Cycles

Customer inventory levels are often the most important early warning signal for semiconductor demand shocks. Semiconductor supply chains are long and complex; customers accumulate inventory to protect against supply shortages. When supply normalizes, customers often work down excess inventory, leading to sudden demand collapses that catch analysts by surprise.

The Inventory Cycle:

  1. Supply Shortage (Months 1–6): Customers face supply scarcity and build inventory to ensure availability. Semiconductor companies ship at high volumes, demand appears strong, backlog expands, and earnings surge.

  2. Inventory Peak (Month 7–9): Customers realize they've accumulated excess inventory. Orders drop as customers consume excess inventory. However, semiconductor company earnings don't immediately suffer because they were shipping at peak volumes in prior months.

  3. Destocking Collapse (Months 10–15): Customers aggressively cancel orders or refuse shipments. Backlog collapses, capacity utilization plummets, pricing falls, and semiconductor company earnings decline sharply.

  4. Demand Bottom (Months 16–24): Market stabilizes, excess inventory is absorbed, and demand begins recovering.

Example from Recent History:

In 2021–2022, the chip shortage drove customers to build inventory aggressively. Semiconductor companies received unprecedented orders. However, by late 2022, customers realized they'd over-ordered and began canceling. Backlog collapsed from 4+ months to 4–6 weeks. In 2023, many semiconductor companies reported revenue declines of 20–30% as destocking worked through supply chains.

Measuring Customer Inventory:

Semiconductor companies rarely report customer inventory directly, but investors can track industry signals:

  • Days inventory outstanding (DIO) in distributors' financial statements
  • Analyst surveys of customer inventory intentions
  • Wafer shipment trends (declining wafer shipments signal destocking)
  • ASP trends (falling ASP during destocking as excess inventory is discounted)

Gross Margin Analysis: Understanding Profitability Drivers

Gross margin in semiconductors is driven primarily by capacity utilization, product mix, and competitive positioning. Understanding margin trends is critical for assessing earnings quality and sustainability.

Margin Patterns by Business Model:

  • Fabless (Design-Only): 50–75% gross margin. Not capital-constrained, margins are stable and driven by product quality and competitive positioning.
  • Integrated Device Manufacturers (IDMs): 30–50% gross margin. Dependent on capacity utilization and product mix. Intel's margins ranged from 25% to 55% over a decade based on competition and capacity utilization.
  • Pure-Play Foundries: 40–55% gross margin. Highly dependent on capacity utilization. TSMC margins moved from 40% in depressed markets to 55% at peak demand.

Interpreting Margin Changes:

When gross margin expands, it can be due to:

  1. Higher capacity utilization (pricing power, strong demand) — sustainable
  2. Product mix shift to higher-value products (AI processors, advanced nodes) — often sustainable if it reflects genuine demand
  3. Cost reductions (manufacturing efficiency improvements) — sustainable
  4. Price increases (pricing power due to scarcity) — often temporary

When gross margin contracts, it can be due to:

  1. Lower capacity utilization (oversupply, destocking) — usually temporary as demand recovers
  2. Product mix shift to lower-value products (older nodes, commodity chips) — may reflect competitive pressure
  3. Cost increases (input costs, labor, fab maintenance) — temporary or structural depending on cause
  4. Price decreases (oversupply, competition) — usually temporary

Critical insight: Margin trends are often more important than absolute margins for predicting earnings changes. A company with 45% gross margin that's been expanding is likely to maintain profitability; a company with 50% margin that's contracting is at risk.

Flowchart: Semiconductor Earnings Cycle Analysis

Real-world examples

Taiwan Semiconductor Manufacturing Company (TSMC) (2022–2023 Cycle): TSMC reported record revenue of approximately $68 billion in 2022 (calendar year) driven by the chip shortage. Gross margin expanded to 54% due to high capacity utilization (95%+) and pricing power. Backlog exceeded 6 months as customers competed for allocation. In 2023, as customers worked down excess inventory, TSMC reported revenue decline to approximately $69 billion (calendar year) on declining volumes, not price declines, indicating modest resilience. Gross margin compressed to 46–48% as utilization fell to 60–70% midyear before recovering. The company's guidance emphasized managing "inventory correction" among customers, signaling management's focus on the destocking cycle.

NVIDIA (FY2024): NVIDIA reported record revenue of $60.9 billion and net income of $42.7 billion, driven by extraordinary demand for data center GPUs used in AI workloads. The company reported gross margin of 75.5%, among the highest in semiconductor history, reflecting fabless model advantages (outsourced manufacturing) and exclusive positioning in AI compute. The company's Product mix shifted dramatically toward high-value AI chips (H100, newer generations), dramatically increasing ASP. However, the company faced risks: increasing competition from AMD and custom chips from hyperscalers, and potential inventory buildup. Declining margins later in the year signaled these risks were manifesting.

Intel (2020–2023 Period): Intel reported a multi-year earnings decline as the company struggled with manufacturing delays and competitive losses. Gross margin fell from 40%+ in 2019 to 35–38% in 2023 due to manufacturing challenges, overcapacity relative to demand, and the shift of market share to competitors. The company's process technology roadmap experienced delays, forcing them to rely on older node manufacturing with lower margins and higher competitive pressure. Capacity utilization fell as demand shifted to competitors with more advanced technology. The company took massive restructuring charges totaling $10+ billion over multiple years, reducing reported earnings and requiring extensive write-downs.

Samsung Semiconductor (2023): Samsung reported declining memory chip earnings in 2023 due to oversupply in DRAM and NAND flash markets. As capacity utilization fell to 50–60%, the company reported gross margins in the low-to-mid 20s, well below historical 35–40% levels. Customers had built excess inventory during the 2021–2022 shortage and were working it down. Pricing for DRAM and NAND declined 20–30% year-over-year as competitors cut prices to maintain volume. The company reduced CapEx guidance, signaling a pullback in capacity expansion, a typical response during cyclical downturns.

Qualcomm (Fabless Example, FY2024): Qualcomm reported revenue decline to $43.2 billion from $47.1 billion due to weakness in smartphone demand, partially offset by improving demand for analog chips and automotive. Gross margin held relatively stable at 57–58%, reflecting the fabless model advantage. Unlike foundries and IDMs dependent on capacity utilization, Qualcomm's margins are less vulnerable to cyclical oversupply. The company reported charge related to the modem business decline but maintained profitability throughout the cycle. This demonstrates fabless model resilience versus integrated manufacturer models.

Common mistakes when analyzing semiconductor earnings

Mistake 1: Focusing on absolute earnings without context of the cycle. A semiconductor company reporting record earnings during peak demand might be a poor investment if it's near the top of the cycle. Conversely, a company reporting depressed earnings during an inventory correction might be an excellent investment if demand is expected to recover. Always assess position in the cycle, not just absolute earnings levels.

Mistake 2: Extrapolating strong revenue growth forward without checking backlog. A company reporting 30% revenue growth with contracting backlog is at risk of deceleration; backlog contraction is often the earliest warning sign of demand softening.

Mistake 3: Confusing ASP trends with demand trends. Revenue growth driven entirely by ASP expansion is less durable than volume-driven growth. Always separate volume and price components.

Mistake 4: Overlooking customer inventory signals. Analyst surveys of customer inventory intentions and wafer shipment trends are often more predictive of future demand than current-period backlog. Companies caught off-guard by sudden inventory corrections often cite lack of visibility into customer inventory levels.

Mistake 5: Comparing gross margins across different business models without understanding drivers. Fabless companies inherently have higher margins than foundries, not because they're more competitive, but because they outsource capital-intensive manufacturing. Always compare IDMs to IDMs, fabless to fabless, and foundries to foundries.

Frequently asked questions

What is the difference between capacity utilization and production volume?

Capacity utilization is the percentage of available manufacturing capacity in use; production volume is the actual quantity of chips or wafers produced. A fab with 100,000-wafer capacity running at 80% utilization is producing 80,000 wafers. High utilization with stable volume indicates stable demand. Rising volume with stable utilization indicates capacity expansion meeting demand growth.

How far ahead can semiconductor companies forecast revenue based on backlog?

Typical backlog represents 4–12 weeks of production visibility. During normal times (2–3 months of backlog), companies have medium-term visibility. During shortage periods (6–12 months of backlog), visibility is very high. During downturns (2–4 weeks of backlog), visibility is minimal. Companies with low backlog face significant forecast uncertainty.

Is ASP growth sustainable or temporary?

ASP growth is sustainable if it's driven by product mix shift to higher-value products or genuine cost reductions. ASP growth driven purely by pricing power during supply shortages is usually temporary. During the 2021–2022 shortage, semiconductor pricing increased 10–15%, but when supply normalized, pricing normalized or declined. Always distinguish temporary pricing from sustainable improvement.

What is gross margin in semiconductors and why does it vary so much?

Gross margin is revenue minus cost of goods sold (primarily manufacturing costs). In semiconductors, gross margin varies dramatically based on capacity utilization, product mix, and competitive positioning. High-value AI chips at peak demand can achieve 70–80% gross margins; commodity memory chips in oversupply can achieve 15–25%. Understanding the margin environment is critical for earnings assessment.

How long do inventory destocking cycles typically last?

Inventory correction cycles typically last 3–6 quarters from peak inventory to normalized levels. The 2021–2022 cycle lasted approximately 4 quarters from peak inventory accumulation (late 2022) to normalized levels (late 2023). Once customers normalize inventory, growth typically resumes, though at lower rates than pre-correction levels.

Why is TSMC's gross margin often used as an industry benchmark?

TSMC, the world's largest pure-play foundry, is a barometer of industry utilization and pricing because it serves all customers and product types. TSMC's gross margin trends often reflect industry-wide supply-demand dynamics. When TSMC margin improves, it signals improving utilization across the industry; when it compresses, it signals oversupply.

  • Capital Intensity and Asset-Heavy Businesses — Understand how capital requirements impact semiconductor profitability
  • Cyclical Industries and Earnings Volatility — Learn cyclical patterns across capital-intensive industries
  • Inventory Management and Working Capital — Examine how customer inventory affects supply chain dynamics
  • Operating Leverage in Manufacturing — Understand how fixed costs create leverage in high-utilization scenarios
  • Cash Flow vs. Earnings in Capital-Intensive Businesses — See how CapEx impacts cash generation
  • Comparing Tech Sector Metrics — Contrast recurring software earnings with cyclical semiconductor earnings

Summary

Semiconductor earnings are fundamentally different from software earnings because they are driven by cyclical supply-demand dynamics, capital intensity, and inventory swings rather than by recurring subscriptions. Capacity utilization rate is the most important operational metric; utilization above 90% indicates tight supply and margin expansion, while below 70% indicates oversupply and compression. Average selling price (ASP) trends are critical to monitor; ASP growth from pricing power during supply shortages is often temporary, while ASP growth from product mix shifts to higher-value products is more sustainable. Order backlog provides visibility into future demand; expanding backlog signals growing demand while contracting backlog is an early warning of demand weakness. Customer inventory levels are the most important early warning signal for earnings shocks; inventory accumulation is typically followed by destocking collapses that surprise the market. Gross margins vary dramatically across business models and cycle positions: fabless companies maintain 50–75% margins (less cycle-dependent), IDMs experience 30–50% margin ranges (highly cycle-dependent), and foundries experience 40–55% ranges (highly cycle-dependent). By understanding the position in the semiconductor cycle, monitoring capacity utilization and backlog trends, and tracking customer inventory levels, investors can identify earnings inflection points often before they appear in reported results, enabling more accurate forward-looking analysis.

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